Theoretical Foundations of VLSI Design

doi:10.1017/CBO9780511569838

This book discusses recent research in the theoretical foundations of several subjects of importance for the design of hardware, and for computer science in general. The physical technologies of very large scale integration (VLSI) are having major effects on the electronic industry. The potential diversity and complexity of digital systems have begun a revolution in the technologies of digital design, involving the application of concepts and methods to do with algorithms and programming. In return, the problems of VLSI design have led to new subjects becoming of importance in computer science. Topics covered in this volume include: models of VLSI complexity; complexity theory; systolic algorithm design; specification theory; verification theory; design by stepwise refinement and transformations. A thorough literature survey with an exhaustive bibliography is also included. The book has grown from a workshop held at the Centre for Theoretical Computer Science at Leeds University and organised by the editors.

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Contents

Frontmatter
pp i-iv
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Contents
pp v-vi
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List of contributors
pp vii-viii
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Preface
pp ix-x
- By K. McEvoy, J. V. Tucker
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Introduction
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1 - Theoretical foundations of hardware design
pp 1-62
- By K. McEvoy, J.V. Tucker
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Part 1 - Formal methods and verification
pp 63-64
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2 - A mechanized proof of correctness of a simple counter
pp 65-96
- By A. Cohn, M. Gordon
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3 - A formal model for the hierarchical design of synchronous and systolic algorithms
pp 97-138
- By K. McEvoy
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4 - Verification of a systolic algorithm in process algebra
pp 139-158
- By W. P. Weijland
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Part 2 - Theory and methodology of design
pp 159-160
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5 - Formal specification of a digital correlator
pp 161-262
- By N. A. Harman, J. V. Tucker
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6 - Describing and reasoning about circuits using relations
pp 263-298
- By M. Sheeran
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7 - The synthesis of VLSI signal processors: theory and example
pp 299-344
- By H. C. Yung
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Part 3 - Methods of circuits and complexity theory
pp 345-346
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8 - The prioritiser experiment: estimation and measurement of computation time in VLSI
pp 347-402
- By P. M. Dew, E. King, J. V. Tucker, A. Williams
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9 - Superpolynomial lower bounds on monotone network complexity
pp 403-438
- By P. E. Dunne
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Theoretical Foundations of VLSI Design

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Contents

Frontmatter
pp i-iv

Contents
pp v-vi

List of contributors
pp vii-viii

Preface
pp ix-x

Introduction

1 - Theoretical foundations of hardware design
pp 1-62

Part 1 - Formal methods and verification
pp 63-64

2 - A mechanized proof of correctness of a simple counter
pp 65-96

3 - A formal model for the hierarchical design of synchronous and systolic algorithms
pp 97-138

4 - Verification of a systolic algorithm in process algebra
pp 139-158

Part 2 - Theory and methodology of design
pp 159-160

5 - Formal specification of a digital correlator
pp 161-262

6 - Describing and reasoning about circuits using relations
pp 263-298

7 - The synthesis of VLSI signal processors: theory and example
pp 299-344

Part 3 - Methods of circuits and complexity theory
pp 345-346

8 - The prioritiser experiment: estimation and measurement of computation time in VLSI
pp 347-402

9 - Superpolynomial lower bounds on monotone network complexity
pp 403-438

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Theoretical Foundations of VLSI Design

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